1. Field of the Invention
The present invention relates to a method of reading a signal in a charge-storage line sensor and, more particularly, to a method of reading a signal wherein switching means respectively corresponding to a plurality of charge-storage means sequentially read out external signals stored after preresetting and resetting operations are sequentially performed during signal read operations.
2. Related Background Art
A conventional method of driving a charge-storage line sensor used in a facsimile system, an image scanner, or the like is used in the following manner.
FIG. 1 is an equivalent circuit diagram of a conventional charge-storage line sensor.
FIG. 2 is a timing chart for explaining the operation of the equivalent circuit.
Referring to FIG. 1, the first terminals of photosensors S1, S2, . . . SN are commonly connected to a bias power source for applying a constant bias voltage Vs thereto, and the second terminals thereof are respectively connected to capacitors C1, C2, . . . CN and drain electrodes of transfer switches SWt1, SWt2, . . . SWtN comprising field effect transistors and drain electrodes of discharge switches SWr1, SWr2, . . . SWrN comprising field effect transistors. The gate electrodes of the transfer switches SWt1, SWt2, . . . SWtN are respectively connected to driving lines G1, G2, . . . GN. The gate electrodes of the discharge switches SWr1, SWr2, . . . SWrN-1, SWrN are respectively connected to the driving lines G2, G3, . . . GN, G1. The source electrodes of the transfer switches SWt1, SWt2, . . . SWtN are commonly connected to a buffer amplifier 1. The source electrodes of the discharge switches SWr1, SWr2, . . . SWrN are commonly connected to a bias line VR for applying a bias voltage thereto.
Photocurrents from the photosensors S1, S2, . . . SN are respectively stored in the capacitors C1, C2, . . . CN, and the stored optical outputs (i.e., voltages Vc1, Vc2, . . . VcN) sequentially enable the transfer switches SWt1, SWt2, . . . SWtN and are transferred to the buffer amplifier 1. The discharge switches SWr1, SWr2, . . . SWrN are turned on to reset (discharge) the voltages through the bias line VR.
The operation of the conventional charge-storage line sensor will be described with reference to FIG. 2.
Gate selection pulses (VG1, VG2, . . . VGN) are respectively applied to the driving lines G1, G2, . . . GN.
When the driving line G1 is selected and the gate selection pulse VG1 is applied thereto, the transfer switch SWt1 is turned on to output the optical output stored in the capacitor C1 to an output terminal Vout through the buffer amplifier 1.
Subsequently, the driving line G2 is selected, and the gate selection pulse VG2 is applied thereto. In this state, the transfer switch SWt2 is turned on to output the optical output stored in the capacitor C2 to the output terminal Vout through the buffer amplifier 1. At this time, the discharge switch SWr1 is also selected, and the discharge switch SWr1 is accordingly turned on. The optical output stored in the capacitor C1 is reset. The capacitors C1, C2, . . . CN store voltages Vc1, Vc2, . . . VcN, respectively. As shown in FIG. 2, the capacitor C1 stores the photocurrent of the photosensor S1 for a storage time Ts between the resetting timing set in response to the gate selection pulse VG2 and the read timing set in response to the next gate selection pulse VG1. In the same operation as described above, the optical outputs from the capacitors C1, C2, . . . CN repeatedly appear at the output terminal Vout.
In the conventional charge-storage line sensor described above, the voltages Vc1, Vc2, . . . VcN of the optical outputs stored in the capacitors C1, C2, . . . CN for the storage time Ts shown in FIG. 2 are represented as follows when the light incident resistances of the photosensors S1, S2, . . . SN are respectively given as Rs1, Rs2, . . . RsN, and the capacitance of the capacitors C1, C2, . . . CN are respectively given as Y1, Y2, . . . , YN: EQU VcX=Vs1-{exp(-Ts/Rsx.multidot.Yx)} for x=1, 2, . . . N (1)
The voltages Vc1, Vc2, . . . VcN are set to Vs/2 when a reference white original is read. When the reference white original is to be read, the resistance RsX of the photosensor and the capacitance Yx in equation (1) satisfy relation Rsx.multidot.Yx.perspectiveto.1.44Ts.
Since the voltages Vc1, Vc2, . . . VcN influence characteristics such as an S/N ratio, dynamic range, and linearity of the detection signal, they must be stabilized. It is, however, very difficult to maintain the constant products of the photosensor resistances Rs1, Rs2, . . . RsN and the capacitor capacitances Y1, Y2, . . . YN in units of lots due to variations in the fabrication process.
In order to maintain constant values in units of lots, the following correction operations are performed:
(1) An amount of light source is controlled;
(2) A bias voltage of the photosensor is regulated; and
(3) The storage time Ts is controlled.
However, item (1), i.e., correction of the amount of light, greatly influences optical response characteristics, optical degradation, and service life of the photosensors, thus resulting in disadvantages in product reliability. Item (2) i.e., regulation of the bias voltage Vs of the photosensors, cannot essentially contribute to correction of the product Rsx.multidot.Yx. In addition, a great change in bias voltage Vs degrades linearity of the detection signal. Item (3), i.e., control of the storage time Ts, is the most preferable control method. However, the storage time Ts depends on the line read period TG, as shown in FIG. 2. The line read period TG is determined by ratings of a system (e.g., a facsimile system or an image scanner incorporating the line sensor. Therefore, the storage time Ts cannot be simply changed. As a result, the storage time Ts cannot be changed either.
Another scheme for controlling the storage time Ts is to modify the circuit arrangement shown in FIG. 1. More specifically, the driving lines connected to the gate electrodes of the transfer switches SWt1, SWt2, . . . SWtN are connected separately from the driving lines connected to the discharge switches SWr1, SWr2, . . . SWrN to offset the discharge timings, thereby varying the storage time. According to this scheme, however, the number of driving lines is increased to 2N, and the connecting steps for the gate drive circuit are doubled, thus resulting in high cost.
The above description exemplifies the photoconductive line sensor. However, the above problems can also apply to a photodiode type line sensor. In particular, in the photodiode type line sensor, when a storage capacitor is constituted by opposite electrodes of the photodiode and a semiconductor layer sandwiched therebetween, a change in thickness of the semiconductor layer directly causes a change in photocurrent and capacitance. Therefore, it is more difficult to control variations in characteristics between the lots.